A common configuration in display systems is shown in FIG. 1. The information to generate a display 12 is stored in a display memory 11. The display memory typically contains thousands of memory cells, each holding a single bit of information. Each bit (or group of bits in the case of color or shaded displays) of information corresponds to a small area, or pixel, in the display 12. Each memory location is used to store the intensity of the pixel. A bit represents or "maps" part of the display. The display 12 is typically a cathode ray tube unit in which the memory contents or some part thereof appear on the screen by scanning the memory.
Display memories are usually organized into strings of pixels or words, along a scan line. Still another way of organizing the display memory is by an array or block organization. In an array organization, the pixels are organized in n by n pixels so that images extending vertically, or perpendicular to scan lines, may also be modified. An explanation of array organization in a system for updating these arrays is found in an article, "A VLSI Architecture For Updating Raster Scan Displays" by Satish Gupta and Robert Sproull in Computer Graphics, Volume 15, No. 3, August 81, pages 71-79.
To change the contents of a display, no matter how arranged in the display memory, a display controller 10 receives part or all of the data in the display memory, or "reads" the information from the memory 11, modifies the data and then returns or "writes" the data back into the display memory 11. The display controller 10 makes its modification in response to instructions from a processor 13. The transfer of data from the display memory, the modification of the data, and the data transfer back into the display memory consumes valuable time. A requirement for many display systems is that the images on the display 12 be updated rapidly. This is particularly true in interactive displays in which a user viewing the display 12 modifies the images as they appear on the screen.
The present invention is specially adapted for display memories organized in arrays to permit a high speed modification of the data in the display memory.